Design of a high gain and power efficient technology for 10 GBPS applications Optical receiver front-end in 0.13 MM RF CMOS
DOI:
https://doi.org/10.31381/perfiles_ingenieria.v12i12.811Keywords:
Tecnología CMOS, amplificador de transimpedancia, amplificador limitador, receptores ópticos, amplificadores de banda anchaAbstract
In this paper, two versions of a complete RF frontend for a 10 Gbps optical receiver are presented. The RF frontend consists of a transimpedance amplifier and a limiter amplifier. Two versions of the TIA amplifiers are proposed. The first topology has 54 dB transimpedance gain, 11.5 GHz bandwidth and has an input current noise density of only 6.8 pA/√ Hz. The second topology is composed by a cascade of two inverters. This topology has 48 dB transimpedance gain, 11.2 GHz bandwidth, a input current noise density of 8.9 pA/√ Hz and occupies an area of only 0.048 mm2. The limiter amplifier for both optical receivers is a five stage cherry-hooper amplifier with active inductors optimized for low power. The main amplifier has 38 dB gain, 9.8 GHz Bandwidth, 69 mW of power consumption and only 0.171 mm2 of die area. The complete RF front-end is fully integrated and has 10 GHz bandwidth. The circuits were designed in 0.13 µm RF CMOS technology.
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